PIC18F1320-H/ML Microchip Technology, PIC18F1320-H/ML Datasheet - Page 169
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1320-H/ML
Manufacturer Part Number
PIC18F1320-H/ML
Description
IC MCU 8BIT 8KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1320-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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18.1
The Low-Voltage Detect Control register controls the
operation of the Low-Voltage Detect circuitry.
REGISTER 18-1:
© 2007 Microchip Technology Inc.
Control Register
bit 7-6
bit 5
bit 4
bit 3-0
LVDCON REGISTER
bit 7
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the Low-Voltage Detect logic will generate the interrupt flag at the specified
0 = Indicates that the Low-Voltage Detect logic will not generate the interrupt flag at the
LVDEN: Low-Voltage Detect Power Enable bit
1 = Enables LVD, powers up LVD circuit
0 = Disables LVD, powers down LVD circuit
LVDL3:LVDL0: Low-Voltage Detection Limit bits
1111 = External analog input is used (input comes from the LVDIN pin)
1110 = 4.04V-5.15V
1101 = 3.76V-4.79V
1100 = 3.58V-4.56V
1011 = 3.41V-4.34V
1010 = 3.23V-4.11V
1001 = 3.14V-4.00V
1000 = 2.96V-3.77V
0111 = 2.70V-3.43V
0110 = 2.53V-3.21V
0101 = 2.43V-3.10V
0100 = 2.25V-2.86V
0011 = 2.16V-2.75V
0010 = 1.99V-2.53V
0001 = Reserved
0000 = Reserved
Legend:
R = Readable bit
-n = Value at POR
Note:
U-0
—
voltage range
specified voltage range and the LVD interrupt should not be enabled
LVDL3:LVDL0 modes, which result in a trip point below the valid operating voltage
of the device, are not tested.
U-0
—
IRVST
R-0
W = Writable bit
‘1’ = Bit is set
LVDEN
R/W-0
PIC18F1220/1320
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LVDL3
R/W-0
LVDL2
R/W-1
x = Bit is unknown
LVDL1
R/W-0
DS39605F-page 167
LVDL0
R/W-1
bit 0
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