ZFSM-201-KIT-1 CALIFORNIA EASTERN LABS, ZFSM-201-KIT-1 Datasheet - Page 8

• Manufacturer Part Number: ZFSM-201-KIT-1
• Manufacturer: CALIFORNIA EASTERN LABS

Specifications of ZFSM-201-KIT-1

• Lead Free Status / Rohs Status: Not Compliant

The JTAG port is used for debugging applications and loading firmware using the IAR
Embedded Workbench® IDE program.
The onboard potentiometers are connected to the Analog to Digital Converter (ADC) pins on the
MC13224V. They are used to demonstrate the functionality of the ADC.
A method for manually erasing the Flash memory using these jumpers is discussed in Section
7.2 of this manual.
The ability to reset the microcontroller on the FreeStar Pro module is provided by this switch.
Additional access to selected I/O pins on the MC13224V is provided at this connector.
User inputs for standalone demonstrations or custom applications.
User outputs for standalone demonstrations or custom applications.
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10 Application Switches [SW1-SW4]
2.2.11 LED’s [D1-D4]
Rev B
JTAG Port [J1 20-pin]:
Variable Resistors [VR1 & VR2]:
FLASH Erase Jumpers [J19 2-pin, J20 2-pin]:
Reset Switch [SW5]:
GPIO Header Connector [J2 26-pin]
KBI0 (GPIO22)
UART2_RTS
UART2_TX
SSI_FSYN
SPI_MOSI
SPI_SCK
I
SSI_TX
2
Table 3 – GPIO Header Connector pins
TMR1
ADC1
ADC3
ADC5
C_SCL
VCC
Table 2 – JTAG Port Connector pins
I/O
not connected
not connected
Description
Document No. 0006-00-08-00-000
DBGACK
DBGRQ
RTCK
VCC
TMS
TDO
TCK
TDI
Pin
11
13
15
17
19
21
23
25
1
3
5
7
9
Pin
11
13
15
17
19
1
3
5
7
9
Pin
10
12
14
16
18
20
22
24
26
2
4
6
8
Pin
10
12
14
16
18
20
6
2
4
8
SSI_RX (GPIO1)
Description
KBI4 (GPIO26)
not connected
not connected
UART2_CTS
UART2_RX
SSI_BITCK
SPI_MISO
GND
GND
GND
GND
GND
GND
GND
GND
GND
I
VCC
SPI_SS
2
C_SDA
ADC2
ADC4
GND
I/O
Page 8 of 42