PBL38640/2SOT Infineon Technologies, PBL38640/2SOT Datasheet - Page 27

• Manufacturer Part Number: PBL38640/2SOT
• Description: IC LINE INTERFACE SLIC PDSO-24
• Manufacturer: Infineon Technologies
• Series: FlexiSLIC™r

Specifications of PBL38640/2SOT

• Function: Subscriber Line Interface Concept (SLIC)
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 2.8mA
• Power (watts): 730mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: DSO-24
• Includes: Current Feeding, Ground Key Detector, Ring Relay Driver
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: PBL38640/2SOTT; SP000007903

2) The two-wire impedance is programmable by selection of external component values according to:
3) Higher return loss values can be achieved by adding a reactive component to
4) The overhead level can be adjusted with the resistor R
5) Pin PTG = Open sets transmit gain to nom. 0.0 dB.
6) The specified insertion loss tolerance does not include errors caused by external components.
7) The level is specified at the two-wire port.
8) The two-wire idle noise is specified with the port terminated in 600
9) If |
10)Previous state must be active - loop or ground key detector.
Figure 3
1/
Data Sheet
Z
Z
Z
G
RSN, and when flowing from ring to tip).
impedance programming resistance, for example by dividing
capacitor from the common point to ground.
specified at the four-wire transmit port, (VTX) with the signal source at the two-wire port. Note that the gain
from the two-wire port to the four-wire transmit port is G
Pin PTG = AGND sets transmit gain to nom. -6.02 dB
Secondary protection resistor R
specified insertion loss is valid for R
grounded (
in 600
The four-wire receive port is grounded (
C
TRX
TRX
T
RSN
2-4S
R
= programming network between the VTX and RSN terminals
V
<<
L
Bat
=
= impedance between the TIPX and RINGX terminals
= receive current gain, nominally 200 (current defined as positive flowing into the receive summing node,
= transmit gain, nominally = 1 (or 0.5, see pin PTG)
Z
+ 2 V |
T
R
(
/(|G
R
L
E
L
,
). The noise specification is referenced to a 600
RX
2-4S
R
= 0; see
V
L
Overhead Level,
TRO
|
= 600 ,
V
BExt
C
RSN
|, where
|) where:
Figure
I
LDC
R
T
7). The four-wire idle noise at
V
F
= 120 k ,
Bat
(see
F
is the voltage at VBAT, the current
TIPX
= 0.
RINGX
V
Figure
E
PBL 38640
TRO
RX
= 0).
, Two-Wire Port
R
9) impacts the insertion loss as explained in
RX
VTX
RSN
27
= 60 k
OV
2-4S
for higher levels, for example min 3.1 V
= 1 (or 0.5, see pin PTG).
V
R
TX
programmed two-wire impedance level at
T
R
R
is specified with the two-wire port terminated
T
RX
into two equal halves and connecting a
(
R
I
L
Leak
), and with the four-wire receive port
Electrical Characteristics
is limited to ~ 5 mA,
E
RX
R
T
, the two-wire terminating
Rev. 2.0, 2005-04-14
PBL 38640/2
Chapter
FlexiSLIC
Fig3_40
Peak
, and is
5. The
V
TX
.