SC16IS741IPW,128 NXP Semiconductors, SC16IS741IPW,128 Datasheet - Page 5

• Manufacturer Part Number: SC16IS741IPW,128
• Description: IC UART 16TSSOP
• Manufacturer: NXP Semiconductors
• Type: IrDA or RS-232 or RS-485r

Specifications of SC16IS741IPW,128

• Number Of Channels: 1, UART
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Features: RS-485
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935290736128

NXP Semiconductors
5. Pinning information
UJA1076_2
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol
i.c.
i.c.
i.c.
V1
i.c.
RSTN
INTN
EN
SDI
SDO
SCK
SCSN
TXDC
RXDC
TEST1
WDOFF
LIMP
Fig 2.
Pin configuration
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
All information provided in this document is subject to legal disclaimers.
WDOFF
Description
internally connected; should be left floating
internally connected; should be left floating
internally connected; should be left floating
voltage regulator output for the microcontroller (5 V or 3.3 V depending on
SBC version)
internally connected; should be left floating
reset input/output to and from the microcontroller
interrupt output to the microcontroller
enable output
SPI data input
SPI data output
SPI clock input
SPI chip select input
CAN transmit data input
CAN receive data output
test pin; pin should be connected to ground
WDOFF pin for deactivating the watchdog
limp home output
TEST1
RXDC
SCSN
RSTN
TXDC
Rev. 02 — 27 May 2010
INTN
SDO
SCK
SDI
EN
i.c.
i.c.
i.c.
V1
i.c.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
UJA1076
High-speed CAN core system basis chip
015aaa109
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
BAT
VEXCTRL
TEST2
VEXCC
WBIAS
i.c.
i.c.
i.c.
SPLIT
GND
CANL
CANH
V2
WAKE2
WAKE1
LIMP
UJA1076
© NXP B.V. 2010. All rights reserved.
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