RTL8201CP REALTEK, RTL8201CP Datasheet - Page 5
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RTL8201CP
Manufacturer Part Number
RTL8201CP
Description
Manufacturer
REALTEK
Datasheet
1.RTL8201CP.pdf
(37 pages)
Specifications of RTL8201CP
Dc
0737
Case
TQFP
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Part Number
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RTL8201CP
Manufacturer:
REALTEK
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Quantity:
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RTL8201CP
Datasheet
Table 26. Auto-Negotiation Mode Pin Settings.......................................................................................... 18
Table 27. Power Saving Mode Pin Settings................................................................................................ 20
Table 28. Absolute Maximum Ratings ....................................................................................................... 23
Table 29. Operating Conditions .................................................................................................................. 23
Table 30. Power Dissipation ....................................................................................................................... 23
Table 31. Input Voltage: Vcc...................................................................................................................... 23
Table 32. MII Transmission Cycle Timing................................................................................................. 24
Table 33. MII Reception Cycle Timing ...................................................................................................... 25
Table 34. SNI Transmission Cycle Timing ................................................................................................ 27
Table 35. SNI Reception Cycle Timing...................................................................................................... 28
Table 36. MDC/MDIO Timing................................................................................................................... 29
Table 37. Crystal Specifications ................................................................................................................. 30
Table 38. Transformer Specifications ......................................................................................................... 30
List of Figures
Figure 1. Block Diagram............................................................................................................................. 2
Figure 2. Pin Assignments .......................................................................................................................... 3
Figure 3. Read Cycle................................................................................................................................. 15
Figure 4. Write Cycle................................................................................................................................ 15
Figure 5. LED and PHY Address Configuration ...................................................................................... 19
Figure 6. LED Definitions ........................................................................................................................ 19
Figure 7. MII Transmission Cycle Timing-1 ............................................................................................ 24
Figure 8. MII Transmission Cycle Timing-2 ............................................................................................ 25
Figure 9. MII Reception Cycle Timing-1 ................................................................................................. 26
Figure 10. MII Reception Cycle Timing-2 ................................................................................................. 26
Figure 11. SNI Transmission Cycle Timing-1............................................................................................ 27
Figure 12. SNI Transmission Cycle Timing-2............................................................................................ 27
Figure 13. SNI Reception Cycle Timing-1 ................................................................................................. 28
Figure 14. SNI Reception Cycle Timing-2 ................................................................................................. 28
Figure 15. MDC/MDIO Timing.................................................................................................................. 29
Figure 16. MDC/MDIO MAC to PHY Transmission Without Collision................................................... 29
Figure 17. MDC/MDIO PHY to MAC Reception Without Error .............................................................. 30
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
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Track ID: JATR-1076-21 Rev. 1.1