AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 386
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AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 386 of 1012
- Download datasheet (16Mb)
32072G–11/2011
register offset and the port offset to the GPIO start address. One bit in each of the configuration
registers corresponds to an I/O pin.
Table 20-1.
Offset
0xAC
0x0C
0x1C
0x2C
0x4C
0x7C
0x9C
0xA0
0xA4
0xA8
0xB0
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x40
0x44
0x48
0x50
0x54
0x58
0x60
0x70
0x74
0x78
0x90
0x94
0x98
0x5c
Output Driver Enable Register
Output Driver Enable Register
Output Driver Enable Register
Output Driver Enable Register
Peripheral Mux Register 0
Peripheral Mux Register 0
Peripheral Mux Register 0
Peripheral Mux Register 0
Peripheral Mux Register 1
Peripheral Mux Register 1
Peripheral Mux Register 1
Peripheral Mux Register 1
Interrupt Mode Register 0
Interrupt Mode Register 0
Interrupt Mode Register 0
Interrupt Mode Register 0
Interrupt Mode Register 1
Interrupt Enable Register
Interrupt Enable Register
Interrupt Enable Register
Interrupt Enable Register
Pull-up Enable Register
Pull-up Enable Register
Pull-up Enable Register
Pull-up Enable Register
GPIO Enable Register
GPIO Enable Register
GPIO Enable Register
GPIO Enable Register
Output Value Register
Output Value Register
Output Value Register
Output Value Register
GPIO Register Memory Map
Pin Value Register
Register
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Function
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Clear
Clear
Clear
Clear
Clear
Read
Clear
Clear
Clear
Set
Set
Set
Set
Set
Set
Set
Set
GPERC
ODERS
ODERC
GPERS
GPERT
PMR0S
PMR0C
PMR1S
PMR1C
ODERT
PUERS
PUERC
PMR0T
PMR1T
PUERT
IMR0S
IMR0C
ODER
OVRC
IMR0T
GPER
PMR0
PMR1
OVRS
OVRT
PUER
Name
IERC
IMR0
IMR1
IERS
IERT
OVR
PVR
IER
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Read-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Access
Reset value
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
386
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