AT32UC3C164C Atmel Corporation, AT32UC3C164C Datasheet - Page 769
AT32UC3C164C
Manufacturer Part Number
AT32UC3C164C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C164C
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C164C-AUR
Manufacturer:
ATMEL
Quantity:
1 240
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29.6.3.2
29.6.3.3
32117C–AVR-08/11
Transmission
Reception
Figure 29-9. Identifier Mask (IDM)
Figure 29-10. Data Fields (64 bits)
Once a message has been written into RAM at the address corresponding to the selected MOb,
user controls transmission through the MOBCTRL register:
Once MOb is enabled (by writing to MOBER), transmission starts as soon as bus idle is detected
on the CAN bus. User can check if channel is sending a frame by reading CANSR.TS bit.
At the end of the successful transmission bit MOBESR.MENn is cleared and MOBSR.TXOK is
set. To acknowledge interrupt and to free the MOb user must clear this status bit by writing a one
to the associated bit in MOb Status Clear Register (MOBSCR).
CAN errors detected during transmission are reported in CANISR. Message will not be transmit-
ted but the MOb remains enabled. The message will be automatically re-transmitted until
successfully transmitted.
Several MObs can be enabled/disabled in one operation by writing to the MOBER/MOBDR
registers:
If several MObs are enabled, the MOb with the lowest number is transmitted first. This rule is
also used in case of a re-transmission (due to transmission error or contention).
Once the expected message has been written into RAM at the address corresponding to the
selected MOb, user controls reception through the MOBCTRL register:
• DLC[3:0] field: Data length code i.e. the number of byte to send, from 0 to 8
• DIR bit: MOb direction, 1 stands for transmission
• MOBER: Each bit correspond to an enable bit for a single MOb. Write 1 to set a bit and 0 to
• MOBDR: Each bit correspond to an enable bit for a single MOb. Write 1 to clear a bit and 0 to
• DLC[3:0] field: Data length code i.e. the number of byte to receive, from 0 to 8
keep it unchanged.
keep it unchanged.
31
31
31
-
-
DB3
DB7
RTRM IDEM
RTRM IDEM
30
30
24
29
29
23
28
28
DB2
DB6
16
-
15
IDM (29 bits)
11
DB1
DB5
10
8
IDM (11 bits)
7
DB0
DB4
0
0
0
Standard format
Extended format
@
@+4
AT32UC3C
769
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