AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 331

• Manufacturer Part Number: AT90CAN64
• Manufacturer: Atmel Corporation

Specifications of AT90CAN64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

24.7.10
7679H–CAN–08/08
Preventing Flash Corruption
The algorithm for reading the Fuse Low byte is similar to the one described above for reading
the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET
and SPMEN bits in SPMCSR. When an LPM instruction is executed within three cycles after the
BLBSET and SPMEN bits are set in the SPMCSR, the value of the Fuse Low byte (FLB) will be
loaded in the destination register as shown below. Refer to
detailed description and mapping of the Fuse Low byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an LPM instruc-
tion is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR,
the value of the Fuse High byte (FHB) will be loaded in the destination register as shown below.
Refer to
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown below.
Refer to
byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
Bit
Rd (Z=0x0000)
Bit
Rd (Z=0x0003)
Bit
Rd (Z=0x0002)
• First, a regular write sequence to the Flash requires a minimum voltage to operate correctly.
• Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage for
1. If there is no need for a Boot Loader update in the system, program the Boot Loader
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
executing instructions is too low.
Lock bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low V
can be used. If a reset occurs while a write operation is in progress, the write operation
will be completed provided that the power supply voltage is sufficient.
Table 25-4 on page 337
Table 25-3 on page 337
FLB7
FHB7
7
7
7
–
CC
, the Flash program can be corrupted because the supply voltage is
FLB6
FHB6
6
6
6
–
for detailed description and mapping of the Fuse High byte.
for detailed description and mapping of the Extended Fuse
FHB5
FLB5
5
5
5
–
FLB4
FHB4
4
4
4
–
FLB3
FHB3
EFB3
3
3
3
AT90CAN32/64/128
FLB2
FHB2
EFB2
2
2
2
Table 25-5 on page 338
CC
FLB1
FHB1
EFB1
reset protection circuit
1
1
1
FLB0
FHB0
EFB0
0
0
0
for a
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