AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 211
AT90PWM3B
Manufacturer Part Number
AT90PWM3B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM3B
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
1
Pwm Channels
12
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM3B-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT90PWM3B-16MUR
Manufacturer:
TI
Quantity:
1 829
Company:
Part Number:
AT90PWM3B-16SU
Manufacturer:
Atmel
Quantity:
4 000
Part Number:
AT90PWM3B-16SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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19.3
19.3.1
4317J–AVR–08/10
Serial Frames
Frame Formats
•
•
A serial frame is defined to be one character of data bits with synchronization bits (start and stop
bits), and optionally a parity bit for error checking.
The EUSART allows to receive and transmit serial frame with the following format:
•
•
•
•
•
•
Asynchonous frames
–
–
Synchronous frames
–
1 start bit
5, 6, 7, 8, 9, 13, 14,15,16,17 data bits
data bits and start bit level encoded or Manchester encoded
data transmition MSB or LSB first (bit ordering)
no, even or odd parity bit
1 or 2 stop bits:
–
–
Standard bit level encoded
Manchester bit encoded
In this mode only the Standard bit level encoded is available
Stop bits insertion for transmition
Stop bits value read access in reception
(Transmit)
TRANSMIT SHIFT REGISTER
(Receive)
RECEIVE SHIFT REGISTER
EUDR
BAUD RATE GENERATOR
EUDR
UBRR[H:L]
EUCSRA
UCSRA
(Transmit)
(Receive)
UDR
UDR
GENERATOR
SYNC LOGIC
RECOVERY
RECOVERY
CHECKER
PARITY
CLOCK
PARITY
DATA
CLKio
EUCSRB
UCSRB
AT90PWM2/3/2B/3B
MANCHESTER
MANCHESTER
ENCODER
DECODER
CONTROL
EUCSRC
UCSRC
PIN
CONTROL
CONTROL
CONTROL
CONTROL
Transmitter
Clock Generator
PIN
PIN
TX
RX
Receiver
XCK
RxD
TxD
211
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