ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 116

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20. Voltage ADC – 7-channel general purpose 12-bit Sigma-Delta ADC
20.1
20.2
20.3
116
Features
Overview
Operation
ATmega16HVB/32HVB
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The Atmel ATmega16HVB/32HVB features a 12-bit Sigma-Delta ADC.
The Voltage ADC (V-ADC) is connected to seven different sources through the Input Multi-
plexer. There are four differential channels for Cell Voltage measurements. These channels are
scaled 0.2× to comply with the Full Scale range of the V-ADC. In addition there are three single
ended channels referenced to SGND. One channel is for measuring the internal temperature
sensor VPTAT and two channels for measuring the voltage at ADC0 and ADC1.
When the V-ADC is not used, power consumption can be minimized by writing the PRVADC bit
in PRR0 to one. See
the PRVADC bit.
Figure 20-1. Voltage ADC block schematic.
To enable V-ADC conversions, the V-ADC Enable bit, VADEN, in V-ADC Control and Status
Register – VADCSR must be set. If this bit is cleared, the V-ADC will be switched off, and any
ongoing conversions will be terminated. The V-ADC is automatically disabled in Power-save and
12-bit resolution
519µs conversion time @ 1MHz clk
Four differential input channels for cell voltage measurements
Three single ended input channels
0.2× pre-scaling of cell voltages
Interrupt on V-ADC conversion complete
ADC1/SGND
ADC0/SGND
VTEMP
PV4
PV3
PV2
PV1
NV
Note:
The shaded signals are scaled by 0.2,
other signals are scaled by 1.0
”PRR0 – Power Reduction Register 0” on page 40
INPUT
MUX
VADC
SIGMA-DELTA ADC
VREF
V-ADC MULTIPLEXER
V-ADC CONTROL
8-BIT DATA BUS
SEL. REG (VADMUX)
12-BIT
SGND
V-ADC CONVERSION COMPLETE IRQ
STATUS REG (VADCSR)
V-ADC DATA REGISTER
V-ADC CONTROL AND
(VADCL/ADCH)
for details on how to use
8042D–AVR–10/11