ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 88

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.7
17.7.1
88
Output compare unit
ATmega16HVB/32HVB
Compare Match Blocking by TCNT0 write
Table 17-3.
Note:
Table 17-4.
Note:
The comparator continuously compares the Timer/Counter (TCNTn) with the Output Compare
Registers (OCRnA and OCRnB), and whenever the Timer/Counter equals to the Output Com-
pare Registers, the comparator signals a match. A match will set the Output Compare Flag at
the next timer clock cycle. In 8-bit mode the match can set either the Output Compare Flag
OCFnA or OCFnB, but in 16-bit mode the match can set only the Output Compare Flag OCFnA
as there is only one Output Compare Unit. If the corresponding interrupt is enabled, the Output
Compare Flag generates an Output Compare interrupt. The Output Compare Flag is automati-
cally cleared when the interrupt is executed. Alternatively, the flag can be cleared by software by
writing a logical one to its I/O bit location.
pare unit.
Figure 17-5. Output Compare Unit, block diagram.
All CPU write operations to the TCNTnH/L Register will block any Compare Match that occur in
the next timer clock cycle, even when the timer is stopped. This feature allows OCRnA/B to be
initialized to the same value as TCNTn without triggering an interrupt when the Timer/Counter
clock is enabled.
ICS0
ICS1
0
1
0
1
1. See
2. The noise canceler cannot be used with this source.
1. The noise canceller will filter out the input capture and it is therefore not recommended to use
noise canceler with these sources.
Timer/Counter0 Input Capture Source (ICS).
Timer/Counter1 Input Capture Source (ICS).
”OSI – Oscillator sampling interface” on page 29
Source
ICP00: Port PB0
ICP01: osi_posedge pin from OSI module
Source
ICP10: Battery Protection Interrupt
ICP11: Voltage Regulator Interrupt
OCRnx
=
Figure 17-5
(8/16-bit Comparator )
DATA BUS
OCFnx (Int.Req.)
(1)
(1)
shows a block diagram of the Output Com-
(1)(2)
for details.
TCNTn
8042D–AVR–10/11