ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 17

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

8. AVR memories
8.1
8.2
8.3
8042D–AVR–10/11
Overview
In-system reprogrammable flash program memory
SRAM data memory
This section describes the different memories in the Atmel ATmega16HVB/32HVB. The AVR
architecture has two main memory spaces, the Data Memory and the Program Memory space.
In addition, the ATmega16HVB/32HVB features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega16HVB/32HVB contains 16K/32Kbytes On-chip in-system reprogrammable flash
memory for program storage. Since all AVR instructions are 16-bits or 32-bits wide, the Flash is
organized as 8K/16K × 16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega16HVB/32HVB Program Counter (PC) is 13/14 bits wide, thus addressing the 8K/16K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
self-programming” on page
description on Flash programming.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 8-1.
Figure 8-2 on page 18
14.
Program memory map.
shows how the ATmega16HVB/32HVB SRAM Memory is organized.
188.
”Memory programming” on page 204
Application Flash Section
Boot Flash Section
Program Memory
ATmega16HVB/32HVB
”Boot loader support – Read-while-write
0x0000
0x1FFF/0x3FFF
”Instruction execution tim-
contains a detailed
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