ATmega2561R212 Atmel Corporation, ATmega2561R212 Datasheet - Page 56
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ATmega2561R212
Manufacturer Part Number
ATmega2561R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega2561R212
Flash (kbytes)
256 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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11.10 Register Description
11.10.1
11.10.2
2549N–AVR–05/11
SMCR – Sleep Mode Control Register
PRR0 – Power Reduction Register 0
There are three alternative ways to disable the OCD system:
•
•
•
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 11-2.
Note:
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 7 - PRTWI: Power Reduction TWI
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When
waking up the TWI again, the TWI should be re initialized to ensure proper operation.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
(0x64)
Read/Write
Initial Value
Disable the OCDEN Fuse
Disable the JTAGEN Fuse
Write one to the JTD bit in MCUCR
SM2
0
0
0
0
1
1
1
1
1. Standby modes are only recommended for use with external crystals or resonators.
PRTWI
Sleep Mode Select
R/W
7
0
7
–
R
0
SM1
0
0
1
1
0
0
1
1
PRTIM2
R/W
6
0
6
–
R
0
ATmega640/1280/1281/2560/2561
PRTIM0
R/W
5
0
R
5
–
0
SM0
0
1
0
1
0
1
0
1
R
4
–
0
R
4
–
0
PRTIM1
R/W
3
0
SM2
R/W
3
0
PRSPI
R/W
2
0
ADC Noise Reduction
SM1
R/W
Extended Standby
2
0
Sleep Mode
Power-down
Power-save
Standby
Reserved
Reserved
PRUSART0
Idle
SM0
R/W
Table
R/W
1
0
1
0
(1)
11-2.
(1)
R/W
SE
PRADC
0
0
R/W
0
0
SMCR
PRR0
56
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