ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 17

• Manufacturer Part Number: ATmega48 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega48 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

5.2.1
5.3
7530I–AVR–02/10
EEPROM Data Memory
Data Memory Access Times
Figure 5-3.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 5-4.
The ATmega48/88/168 contains 256/512/512 bytes of data EEPROM memory. It is organized
as a separate data space, in which single bytes can be read and written. The EEPROM has an
endurance of at least 100,000 write/erase cycles. The access between the EEPROM and the
CPU is described in the following, specifying the EEPROM Address Registers, the EEPROM
Data Register, and the EEPROM Control Register.
“Memory Programming” on page 278
in SPI or Parallel Programming mode.
Address
clk
Data Memory Map
On-chip Data SRAM Access Cycles
Data
Data
WR
CPU
RD
(512/1024/1024 x 8)
160 Ext I/O Reg.
64 I/O Registers
Data Memory
Compute Address
Internal SRAM
32 Registers
T1
Memory Access Instruction
contains a detailed description on EEPROM Programming
ATmega48/88/168 Automotive
0x02FF/0x04FF/0x04FF
0x0000 - 0x001F
0x0020 - 0x005F
0x0060 - 0x00FF
0x0100
Address valid
CPU
T2
cycles as described in
Next Instruction
T3
Figure
5-4.
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