ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 303

• Manufacturer Part Number: ATmega48 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega48 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.8.1
27. 2-wire Serial Interface Characteristics
Table 27-1
Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to
Table 27-1.
7530I–AVR–02/10
Symbol
VIL
VIH
Vhys
VOL
tr
tof
tSP
I
C
f
Rp
t
t
i
SCL
HD;STA
LOW
(1)
(1)
i
(1)
(1)
(1)
(1)
RC Oscillator Precision for LIN Slave implementation
describes the requirements for devices connected to the 2-wire Serial Bus. The ATmega48/88/168 2-wire Serial
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Rise Time for both SDA and SCL
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
Capacitance for each I/O Pin
SCL Clock Frequency
Value of Pull-up resistor
Hold Time (repeated) START Condition
Low Period of the SCL Clock
2-wire Serial Bus Requirements
Figure
For LIN slave devices, the precision of the RC oscillator before and after re-synchronization are
described in the Figure 26-2
Table 26-2.
Parameter
F
F
TOL_UNSYNCH
TOL_SYNCH
27-1.
IHmin
to V
ILmax
Oscillator Tolerance Before and After re-Synchronization Algorithm
(2.7V<V
Clock Tolerance
Deviation of slave node clock from the nominal clock rate before
synchronization; relevant for nodes making use of
synchronization and direct SYNCH BREAK detection.
Deviation of slave node clock relative to the master node clock
after synchronization; relevant for nodes making use of
synchronization; any slave node must stay within this tolerance
for all fields of a frame which follow the SYNCH FIELD.
Note: For communication between any two nodes their bit rate
must not differ by more than ±2%.
CC
<5.5V, -40°C to +125°C)
f
CK
(4)
10 pF < C
0.1V
> max(16f
3 mA sink current
f
f
SCL
f
f
SCL
f
f
SCL
SCL
SCL
SCL
CC
Condition
> 100 kHz
ATmega48/88/168 Automotive
< V
> 100 kHz
> 100 kHz
100 kHz
100 kHz
100 kHz
b
< 400 pF
SCL
i
< 0.9V
, 250kHz)
(6)
(7)
CC
(3)
(5)
20 + 0.1C
20 + 0.1C
V
----------------------------
V
----------------------------
0.05 V
CC
CC
0.7 V
3mA
3mA
-0.5
Min
-10
4.0
0.6
4.7
1.3
–
–
0
0
–
0
0,4V
0,4V
CC
CC
b
b
(2)
(3)(2)
(3)(2)
V
0.3 V
1000ns
------------------ -
CC
300ns
--------------- -
50
Max
300
250
400
±14.0 %
±2.0 %
0.4
C
10
10
C
–
–
–
–
–
F/F
+ 0.5
b
(2)
b
CC
Master
Units
kHz
µA
pF
ns
ns
ns
µs
µs
µs
µs
V
V
V
V
303