ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 304

• Manufacturer Part Number: ATmega48 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega48 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 27-1.
Notes:
304
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega48/88/168, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega48/88/168 2-wire Serial Interface operation. Other devices connected to the 2-wire
6. The actual low period generated by the ATmega48/88/168 2-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega48/88/168 2-wire Serial Interface is (1/f
ATmega48/88/168 Automotive
Serial Bus need only obey the general f
than 6 MHz for the low time requirement to be strictly met at f
ment will not be strictly met for f
communicate at full speed (400 kHz) with other ATmega48/88/168 devices, as well as any other device with a proper t
acceptance margin.
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
2-wire Serial Bus Requirements
Figure 27-1. 2-wire Serial Bus Timing
SCL
SCL
SDA
> 100 kHz.
t
SU;STA
SCL
> 308 kHz when f
SCL
requirement.
t
HD;STA
t
t
of
LOW
CK
= 8 MHz. Still, ATmega48/88/168 devices connected to the bus may
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
SCL
t
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
HD;DAT
= 100 kHz.
t
LOW
t
SU;DAT
SCL
SCL
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
- 2/f
- 2/f
CK
CK
), thus the low time require-
), thus f
t
SU;STO
t
r
CK
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
must be greater
7530I–AVR–02/10
t
BUF
Units
LOW
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs