ATmega88 Atmel Corporation, ATmega88 Datasheet - Page 46
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ATmega88
Manufacturer Part Number
ATmega88
Description
Manufacturer
Atmel Corporation
Specifications of ATmega88
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Quantity
Price
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11.3
2545T–AVR–05/11
Power-on reset
Figure 11-1. Reset logic.
A power-on reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
V
well as to detect a failure in supply voltage.
A power-on reset (POR) circuit ensures that the device is reset from power-on. Reaching the
power-on reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 11-2. MCU start-up, RESET tied to V
CC
is below the detection level. The POR circuit can be used to trigger the start-up Reset, as
INTERNAL
TIME-OUT
BODLEVEL [2..0]
RSTDISBL
CC
RESET
RESET
V
decreases below the detection level.
CC
“System and reset characteristics” on page
Pull-up resistor
FILTER
SPIKE
V
V
POT
RST
CC
t
TOUT
CKSEL[3:0]
rise. The RESET signal is activated again, without any delay,
Power-on reset
Reset circuit
SUT[1:0]
reset circuit
Brown-out
Watchdog
Watchdog
oscillator
generator
circuit
timer
Clock
CC.
CK
register (MCUSR)
MCU status
DATA BUS
Delay counters
307. The POR is activated whenever
ATmega48/88/168
TIMEOUT
46