ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 123

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ATmega8HVA

Manufacturer Part Number
ATmega8HVA
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8HVA

Flash (kbytes)
8 Kbytes
Pin Count
28
Max. Operating Frequency
4 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-20 to 85
I/o Supply Class
1.8 to 9.0
Operating Voltage (vcc)
1.8 to 9.0
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
22.3
22.4
22.4.1
8024A–AVR–04/08
Voltage Regulator Monitor
Register Description
ROCR – Regulator Operating Condition Register
This module monitors the operating state of the Voltage Regulator. If the voltage at VFET drops
below the Regulator Short-circuit Level (RSCL), see
Voltage Regulator enters the Battery Pack Short mode. In this mode, VFET is disconnected from
VREG to avoid a quick drop in the voltage regulator output. When the voltage regulator enters
this mode, the chip will be completely powered by the external reservoir capacitor (CREG). This
allows the chip to operate a certain time without entering BOD reset, even if the VFET voltage is
too low for the voltage regulator to operate.
An interrupt is issued when the regulator enters Battery Pack Short mode, if the ROCWIE bit in
ROCR Register is set. This allows actions to be taken to reduce power consumption and hence
prolonging the time that CREG can be used to power the chip. In a typical short-circuit situation,
VFET will drop as a consequence of high current consumption, and recover as soon as the Bat-
tery Protection module has disabled the FETs. Hence CREG should be dimensioned so that the
chip can sustain operation without entering BOD reset, until the FETs are disabled either by HW
or SW. To minimize power consumption when the Voltage Regulator enters the Battery Pack
Short mode, the chip should enter Power-save sleep mode as soon as possible after the ROC-
WIF interrupt is detected. The Watchdog Timer should be configured to wake up the CPU after a
time that is considered safe, see appnote AVR132 for use of enhanced Watchdog Timer. Soft-
ware should then check the status of the ROC flag. If the ROCS flag is cleared, normal operation
may be resumed.
• Bit 7 – ROCS: ROC Status
This bit is set when the Voltage Regulator operates in the Battery Pack Short mode, and cleared
otherwise.
• Bit 6:2 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 1 – ROCWIF: ROC Warning Interrupt Flag
The ROCWIF Flag is set within the ROCW reaction time when the Voltage Regulator enters the
Battery Pack Short mode. The flag is cleared by writing a logic one to it or by hardware, by exe-
cuting the corresponding interrupt handling vector.
• Bit 0 – ROCWIE: ROC Warning Interrupt Enable
The ROCWIE bit enables interrupt caused by the Regulator Operating Condition Warning inter-
rupt flag.
Bit
(0xC8)
Read/Write
Initial Value
ROCS
R
7
0
R
6
0
-
R
5
0
-
R
4
0
-
R
0
3
-
”Electrical Characteristics” on page
ATmega8HVA/16HVA
R
2
0
-
ROCWIF
R/W
1
0
ROCWIE
R/W
0
0
ROCR
165, the
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