ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 81

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.5.3
17.5.4
8024A–AVR–04/08
16-bit Mode
Clear Timer on Compare Match (CTC) 16-bit Mode
Figure 17-3. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCFnA Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating
the TOP value. However, changing TOP to a value close to BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care. If the new value written to
OCRnA is lower than the current value of TCNTn, the counter will miss the Compare Match. The
counter will then have to count to its maximum value (0xFF) and wrap around starting at 0x00
before the Compare Match can occur. As for the Normal mode of operation, the TOVn Flag is
set in the same timer clock cycle that the counter counts from MAX to 0x00.
In 16-bit mode, the counter (TCNTnH/L) is a incrementing until it overruns when it passes its
maximum 16-bit value (MAX = 0xFFFF) and then restarts from the bottom (0x0000), see
17-2 on page 80
cycle as the TCNTnH/L becomes zero. The TOVn Flag in this case behaves like a 17th bit,
except that it is only set, not cleared. However, combined with the timer overflow interrupt that
automatically clears the TOVn Flag, the timer resolution can be increased by software. There
are no special cases to consider in the Normal mode, a new counter value can be written any-
time. The Output Compare Unit can be used to generate interrupts at some given time.
In Clear Timer on Compare 16-bit mode, OCRnB/A Registers are used to manipulate the
counter resolution, see
cleared to zero when the counter value (TCNTn) matches OCRnB/A, where OCRnB represents
the eight most significant bits and OCRnA represents the eight least significant bits. OCRnB/A
defines the top value of the counter, hence also its resolution. This mode allows greater control
of the Compare Match output frequency. It also simplifies the operation of counting external
events.
An interrupt can be generated each time the counter reaches the TOP value by using the
OCFnA flag. If the interrupt is enabled, the interrupt handler routine can be used for updating the
TOP value. However, changing the TOP to a value close the BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care since the CTC mode does not
have the double buffering feature. If the new value written to OCRnB/A is lower than the current
value of TCNTn, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFFFF) and wrap around starting at 0x0000 before Compare Match can
occur. As for the 16-bit Mode, the TOVn Flag is set in the same timer clock cycle that the counter
counts from MAX to 0x0000.
TCNTn
Period
for bit settings. The Overflow Flag (TOVn) will be set in the same timer clock
1
Table 17-2 on page 80
2
3
for bit settings. In CTC mode the counter is
4
ATmega8HVA/16HVA
OCnx Interrupt Flag Set
Table
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