ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 36

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Table 10-2.
Notes:
10.2
10.3
10.4
36
Module
WDT
VREG
CHARGER_DETECT
VREGMON
OSI
1. Discharge FET must be switched off for Charger Detect to be enabled.
2. RCOSC_FAST runs in Power-save mode if DUVR mode is enabled. It also runs for approximately 125 ms after C-FET/D-
3. RCOSC_SLOW only runs if CC-ADC is enabled or when the oscillator is selected as input to the Oscillator sampling Inter-
4. Instantaneous and Accumulate Conversion Complete wake-up only.
Idle Mode
ADC Noise Reduction
Power-save Mode
ATmega8HVA/16HVA
FET has been enabled.
face and sampling is enabled.
Active modules in different Sleep Modes (Continued)
(1)
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
mode, stopping the CPU but allowing all peripheral functions to continue operating. This sleep
mode basically halts clk
enables the MCU to wake up from external triggered interrupts as well as internal ones like the
Timer Overflow interrupt.
When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the Voltage ADC (V-ADC), Watchdog
Timer (WDT), Coulomb Counter (CC), Current Battery Protection (CBP), and the Ultra Low
Power RC Oscillator (RCOSC_ULP) to continue operating. This sleep mode basically halts
clk
This improves the noise environment for the Voltage ADC, enabling higher resolution
measurements.
When the SM2..0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. In this mode, the internal Fast RC Oscillator (RCOSC_FAST) is stopped, while
Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery Protection (CBP), the Ultra
Low Power RC Oscillator (RCOSC_ULP), and the Slow RC oscillator (RCOSC_SLOW) continue
operating.
This mode will be the default mode when application software does not require operation of
CPU, Flash or any of the peripheral units running at the Fast internal Oscillator (RCOSC_FAST).
If the current through the sense resistor is so small that the Coulomb Counter cannot measure it
accurately, Regular Current detection should be enabled to reduce power consumption. The
WDT keeps accurately track of the time so that battery self discharge can be calculated.
I/O
, clk
CPU
Active
, and clk
X
X
X
X
X
FLASH
CPU
, while allowing the other clocks to run.
and clk
Idle
X
X
X
X
X
FLASH
, while allowing the other clocks to run. Idle mode
ADC Noise
Reduction
Mode
X
X
X
X
Power-save
X
X
X
Power-off
8024A–AVR–04/08
X