ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 79
ATmega8HVA
Manufacturer Part Number
ATmega8HVA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega8HVA
Flash (kbytes)
8 Kbytes
Pin Count
28
Max. Operating Frequency
4 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-20 to 85
I/o Supply Class
1.8 to 9.0
Operating Voltage (vcc)
1.8 to 9.0
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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17.4
8024A–AVR–04/08
Counter Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
17-2 on page 79
Figure 17-2. Counter Unit Block Diagram
The counter is incremented at each timer clock (clk
restarts from BOTTOM. The counting sequence is determined by the setting of the WGMn0 bits
located in the Timer/Counter Control Register (TCCRnA). For more details about counting
sequences, see
external or internal clock source, selected by the Clock Select bits (CSn2:0). When no clock
source is selected (CSn2:0 = 0) the timer is stopped. However, the TCNTn value can be
accessed by the CPU, regardless of whether clk
priority over) all counter clear or count operations. The Timer/Counter Overflow Flag (TOVn) is
set when the counter reaches the maximum value and it can be used for generating a CPU
interrupt.
Signal description (internal signals):
count
clk
top
Tn
Increment or decrement TCNTn by 1.
Timer/Counter clock, referred to as clk
Signalize that TCNTn has reached maximum value.
”Timer/Counter Timing Diagrams” on page
shows a block diagram of the counter and its surroundings.
DATA BUS
TCNTn
count
Control Logic
Tn
top
is present or not. A CPU write overrides (has
Tn
Tn
TOVn
(Int.Req.)
clk
ATmega8HVA/16HVA
in the following.
) until it passes its TOP value and then
Tn
85. clk
Clock Select
( From Prescaler )
Detector
Edge
Tn
can be generated from an
Tn
Figure
79
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