ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 82

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.5.5
17.5.6
17.6
82
Input Capture Unit
ATmega8HVA/16HVA
8-bit Input Capture Mode
16-bit Input Capture Mode
The Timer/Counter can be used in a 8-bit Input Capture mode, see
settings. For full description, see
The Timer/Counter can also be used in a 16-bit Input Capture mode, see
for bit settings. For full description, see
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicates an event, or mul-
tiple events. For Timer/Counter0, the events can be applied via the PC0 pin (ICP01), or
alternatively via the osi_posedge pin on the Oscillator Sampling Interface (ICP00). For
Timer/Counter1, the events can be applied by the Battery Protection Interrupt (ICP10) or alter-
natively by the Voltage Regulator Interrupt (ICP11). The time-stamps can then be used to
calculate frequency, duty-cycle, and other features of the signal applied. Alternatively the time-
stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in
elements of the block diagram that are not directly a part of the Input Capture unit are gray
shaded.
Figure 17-4. Input Capture Unit Block Diagram
The Output Compare Register OCRnA is a dual-purpose register that is also used as an 8-bit
Input Capture Register ICRn. In 16-bit Input Capture mode the Output Compare Register
OCRnB serves as the high byte of the Input Capture Register ICRn. In 8-bit Input Capture mode
the Output Compare Register OCRnB is free to be used as a normal Output Compare Register,
but in 16-bit Input Capture mode the Output Compare Unit cannot be used as there are no free
Output Compare Register(s). Even though the Input Capture register is called ICRn in this sec-
tion, it is referring to the Output Compare Register(s). For more information on how to access
the 16-bit registers refer to
ICPn1
ICPn0
WRITE
OCRnB (8-bit)
TEMP (8-bit)
ICRn (16-bit Register)
”Accessing Registers in 16-bit Mode” on page
”Input Capture Unit” on page
OCRnA (8-bit)
ICSn
”Input Capture Unit” on page
DATA BUS
Canceler
Noise
ICNCn
(8-bit)
TCNTnH (8-bit)
TCNTn (16-bit Counter)
Detector
82.
ICESn
Edge
Table 17-2 on page 80
Figure 17-4 on page
82.
TCNTnL (8-bit)
Table 17-2 on page 80
86.
ICFn (Int.Req.)
8024A–AVR–04/08
82. The
for bit