ATxmega64B1 Atmel Corporation, ATxmega64B1 Datasheet - Page 160
ATxmega64B1
Manufacturer Part Number
ATxmega64B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64B1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64B1-AUR
Manufacturer:
ATMEL
Quantity:
210
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13.7.4
13.7.5
13.8
13.8.1
8291A–AVR–10/11
Compare Channel
32-bit Input Capture
Capture Overflow
Waveform Generation
Figure 13-13. Pulse width capture of an external signal.
Two timer/counters can be used together to enable true 32-bit input capture. In a typical 32-bit
input capture setup, the overflow event of the least-significant timer is connected via the event
system and used as the clock input for the most-significant timer.
The most-significant timer will be updated one peripheral clock period after an overflow occurs
for the least-significant timer. To compensate for this, the capture event for the most-significant
timer must be equally delayed by setting the event delay bit for this timer.
The timer/counter can detect buffer overflow of the input capture channels. When both the buffer
valid flag and the capture interrupt flag are set and a new capture event is detected, there is
nowhere to store the new timestamp. If a buffer overflow is detected, the new value is rejected,
the error interrupt flag is set, and the optional interrupt is generated.
Each compare channel continuously compares the counter value (CNT) with the CCx register. If
CNT equals CCx, the comparator signals a match. The match will set the CC channel's interrupt
flag at the next timer clock cycle, and the event and optional interrupt are generated.
The compare buffer register provides double buffer capability equivalent to that for the period
buffer. The double buffering synchronizes the update of the CCx register with the buffer value to
either the TOP or BOTTOM of the counting sequence according to the UPDATE condition. The
synchronization prevents the occurrence of odd-length, non-symmetrical pulses for glitch-free
output.
The compare channels can be used for waveform generation on the corresponding port pins. To
make the waveform visible on the connected port pin, the following requirements must be
fulfilled:
external signal
events
CNT
1. A waveform generation mode must be selected.
2. Event actions must be disabled.
BOTTOM
MAX
Pulsewitdh (t
p
)
Atmel AVR XMEGA B
"capture"
160
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