ATxmega64B1 Atmel Corporation, ATxmega64B1 Datasheet - Page 420
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ATxmega64B1
Manufacturer Part Number
ATxmega64B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64B1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64B1-AUR
Manufacturer:
ATMEL
Quantity:
210
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8291A–AVR–10/11
19 TWI – Two-Wire Interface .................................................................... 237
20 SPI – Serial Peripheral Interface ......................................................... 262
21 USART ................................................................................................... 268
18.13
18.14
18.15
18.16
18.17
18.18
18.19
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.8
19.9
19.10
19.11
19.12
19.13
19.14
20.1
20.2
20.3
20.4
20.5
20.6
20.7
20.8
20.9
21.1
21.2
Register Description – USB ...........................................................................223
Register Description – USB Endpoint ............................................................230
Register Description - Frame .........................................................................235
Register Summary – USB Module .................................................................236
Register Summary – USB Endpoint ..............................................................236
Register Summary – Frame ..........................................................................236
USB Interrupt Vector Summary .....................................................................236
Features ........................................................................................................237
Overview ........................................................................................................237
General TWI Bus Concepts ...........................................................................238
TWI Bus State Logic ......................................................................................243
TWI Master Operation ...................................................................................244
TWI Slave Operation .....................................................................................246
Enabling External Driver Interface .................................................................248
Register Description – TWI ............................................................................249
Register Description – TWI Master ................................................................250
Register Description – TWI Slave ..................................................................255
Register Summary - TWI ...............................................................................261
Register Summary - TWI Master ...................................................................261
Register Summary - TWI Slave .....................................................................261
Interrupt Vector Summary .............................................................................261
Features ........................................................................................................262
Overview ........................................................................................................262
Master Mode ..................................................................................................263
Slave Mode ....................................................................................................263
Data Modes ...................................................................................................264
DMA Support .................................................................................................264
Register Description ......................................................................................265
Register Summary .........................................................................................267
Interrupt vector Summary ..............................................................................267
Features ........................................................................................................268
Overview ........................................................................................................268
Atmel AVR XMEGA B
vii
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