ATxmega64B1 Atmel Corporation, ATxmega64B1 Datasheet - Page 34
ATxmega64B1
Manufacturer Part Number
ATxmega64B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64B1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64B1-AUR
Manufacturer:
ATMEL
Quantity:
210
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8291A–AVR–10/11
Table 4-10.
• Bit 3:2 – BLBAT[1:0]: Boot Lock Bit Application Table Section
These lock bits control the security level for the application table section. The BLBAT bits can
only be written to a more strict locking. Resetting the BLBAT bits is possible by executing a chip
erase command.
Table 4-11.
BLBAT[1:0]
BLBA[1:0]
11
10
01
00
11
10
01
00
Boot lock bit for the application section.
Boot lock bit for the application table section.
Group Configuration
Group Configuration
RWLOCK
RWLOCK
NOLOCK
NOLOCK
WLOCK
WLOCK
RLOCK
RLOCK
Description
No Lock - no restrictions for SPM and (E)LPM
accessing the application section.
Write lock – SPM is not allowed to write the application
section.
Read lock – (E)LPM executing from the boot loader
section is not allowed to read from the application
section.
If the interrupt vectors are placed in the boot loader
section, interrupts are disabled while executing from the
application section.
Read and write lock – SPM is not allowed to write to the
application section, and (E)LPM executing from the boot
loader section is not allowed to read from the
application section.
If the interrupt vectors are placed in the boot loader
section, interrupts are disabled while executing from the
application section.
Description
No lock – no restrictions for SPM and (E)LPM accessing
the application table section.
Write lock – SPM is not allowed to write the application
table
Read lock – (E)LPM executing from the boot loader
section is not allowed to read from the application table
section.
If the interrupt vectors are placed in the boot loader
section, interrupts are disabled while executing from the
application section.
Read and write lock – SPM is not allowed to write to the
application table section, and (E)LPM executing from
the boot loader section is not allowed to read from the
application table section.
If the interrupt vectors are placed in the boot loader
section, interrupts are disabled while executing from the
application section.
Atmel AVR XMEGA B
34
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