ATxmega64B1 Atmel Corporation, ATxmega64B1 Datasheet - Page 70
ATxmega64B1
Manufacturer Part Number
ATxmega64B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64B1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64B1-AUR
Manufacturer:
ATMEL
Quantity:
210
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6.7.2
8291A–AVR–10/11
QDEC Setup
For a full QDEC setup, the following is required:
The following procedure should be used for QDEC setup:
The angle of a quadrature encoder attached to QDPH0, QDPH90 (and QINDX) can now be read
directly from the timer/counter count register. If the count register is different from BOTTOM
when the index is recognized, the timer/counter error flag is set. Similarly, the error flag is set if
the position counter passes BOTTOM without the recognition of the index.
• Two or three I/O port pins for quadrature signal input
• Two event system channels for quadrature decoding
• One timer/counter for up, down, and optional index count
1. Choose two successive pins on a port as QDEC phase inputs.
2. Set the pin direction for QDPH0 and QDPH90 as input.
3. Set the pin configuration for QDPH0 and QDPH90 to low level sense.
4. Select the QDPH0 pin as a multiplexer input for an event channel, n.
5. Enable quadrature decoding and digital filtering in the event channel.
6. Optional:
7. Set quadrature decoding as the event action for a timer/counter.
8. Select event channel n as the event source for the timer/counter.
• Set the period register of the timer/counter to ('line count' * 4 - 1), the line count of the
• Enable the timer/counter without clock prescaling.
quadrature encoder.
a. Set up a QDEC index (QINDX).
b. Select a third pin for QINDX input.
c. Set the pin direction for QINDX as input.
d. Set the pin configuration for QINDX to sense both edges.
e. Select QINDX as a multiplexer input for event channel n+1
f.
g. Select the index recognition mode for event channel n+1.
Set the quadrature index enable bit in event channel n+1.
Atmel AVR XMEGA B
70
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