ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 11

• Manufacturer Part Number: ATxmega64B3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64B3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.10
3.10.1
8291A–AVR–10/11
RAMP and Extended Indirect Registers
RAMPX, RAMPY and RAMPZ Registers
Figure 3-5.
The lowest register address holds the least-significant byte (LSB), and the highest register
address holds the most-significant byte (MSB). In the different addressing modes, these address
registers function as fixed displacement, automatic increment, and automatic decrement (see
the instruction set reference for details).
In order to access program memory or data memory above 64KB, the address pointer must be
larger than 16 bits. This is done by concatenating one register to one of the X-, Y-, or Z-registers.
This register then holds the most-significant byte (MSB) in a 24-bit address or address pointer.
These registers are available only on devices with external bus interface and/or more than 64KB
of program or data memory space. For these devices, only the number of bits required to
address the whole program and data memory space in the device is implemented in the
registers.
The RAMPX, RAMPY and RAMPZ registers are concatenated with the X-, Y-, and Z-registers,
respectively, to enable indirect addressing of the whole data memory space above 64KB and up
to 16MB.
Figure 3-6.
When reading (ELPM) and writing (SPM) program memory locations above the first 128KB of
the program memory, RAMPZ is concatenated with the Z-register to form the 24-bit address.
LPM is not affected by the RAMPZ setting.
Bit (Individually)
Bit (X-pointer)
Bit (Individually)
Bit (Y-pointer)
Bit (Individually)
Bit (Z-pointer)
Bit (individually)
X-register
Bit (X-register)
Bit (individually)
Y-register
Bit (Y-register)
Bit (individually)
Z-register
Bit (Z-register)
The X-, Y- and Z-registers
The combined RAMPX + X, RAMPY + Y and RAMPZ + Z registers.
23
23
23
7
7
7
7
15
7
15
7
15
RAMPX
RAMPY
RAMPZ
R27
R29
R31
XH
YH
ZH
16
16
16
0
0
0
.
15
15
15
7
7
7
Atmel AVR XMEGA B
0
8
0
8
0
8
XH
YH
ZH
7
7
7
7
7
7
0
8
0
8
0
8
7
7
7
7
7
7
R26
R28
R30
XL
YL
ZL
XL
YL
ZL
0
0
0
0
0
0
11
0
0
0
0
0
0