ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 71

• Manufacturer Part Number: ATxmega64B3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64B3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

6.8
6.8.1
8291A–AVR–10/11
Register Description
CHnMUX – Channel n Multiplexer Register
• Bit 7:0 – CHnMUX[7:0]: Channel Multiplexer
These bits select the event source according to
devices regardless of whether the peripheral is present or not. Selecting event sources from
peripherals that are not present will give the same result as when this register is zero. When this
register is zero, no events are routed through. Manually generated events will override CHnMUX
and be routed to the event channel even if this register is zero.
Table 6-3.
Bit
Read/Write
Initial Value
CHnMUX[7:4]
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0001
0001
0001
0001
0001
0001
0001
0010
0010
R/W
CHnMUX[7:0] bit settings .
7
0
CHnMUX[3:0]
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
R/W
X
0
0
0
1
0
0
0
0
1
0
0
0
0
1
1
1
0
0
6
0
X
X
X
0
0
1
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
X
X
X
X
X
X
R/W
0
1
0
1
0
0
1
0
1
0
1
5
0
Group Configuration
RTC_OVF
RTC_CMP
ACA_CH0
ACA_CH1
ACA_WIN
ACB_CH0
ACB_CH1
ACB_WIN
ADCA_CHn
R/W
4
0
CHnMUX[7:0]
Table
R/W
3
0
Atmel AVR XMEGA B
6-3. This table is valid for all XMEGA
R/W
Event Source
None (manually generated events only)
(Reserved)
(Reserved)
(Reserved)
RTC overflow
RTC compare match
USB start of frame on CH0
USB error on CH1
USB overflow on CH2
USB setup on CH3
(Reserved)
(Reserved)
ACA channel 0
ACA channel 1
ACA window
ACB channel 0
ACB channel 1
ACB window
(Reserved)
(Reserved)
ADCA channel n (n =0)
(Reserved)
2
0
R/W
1
0
R/W
0
0
CHnMUX
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