ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 181

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ATxmega64B3

Manufacturer Part Number
ATxmega64B3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64B3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.8
14.9
8291A–AVR–10/11
DMA Support
Timer/Counter Commands
Timer/counter underflow and compare interrupt flags can trigger a DMA transaction. The
acknowledge condition that clears the flag/request is listed in
Table 14-1.
A set of commands can be given to the timer/counter by software to immediately change the
state of the module. These commands give direct control of the update, restart, and reset
signals.
The software can force a restart of the current waveform period by issuing a restart command. In
this case the counter, direction, and all compare outputs are set to zero.
A reset command will set all timer/counter registers to their initial values. A reset can only be
given when the timer/counter is not running (OFF).
Request
LUNFIF
HUNFIF
CCIF{D,C,B,A}
DMA request sources.
Acknowledge
DMAC writes to LCNT
DMAC writes to LPER
DMAC writes to HCNT
DMAC writes to HPER
DMAC access of
LCMP{D,C,B,A}
Atmel AVR XMEGA B
Table 14-1 on page
Comment
Output compare operation
181.
181

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