ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 288

• Manufacturer Part Number: ATxmega64B3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64B3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.15.6
21.15.7
8291A–AVR–10/11
BAUDCTRLA – Baud Rate register A
BAUDCTRLB – Baud Rate register B
• Bit 2 – UDORD: Data Order
This bit is only for master SPI mode, and this bit sets the frame format. When written to one, the
lsb of the data word is transmitted first. When written to zero, the msb of the data word is trans-
mitted first. The receiver and transmitter use the same setting. Changing the setting of UDORD
will corrupt all ongoing communication for both receiver and transmitter.
• Bit 1 – UCPHA: Clock Phase
This bit is only for master SPI mode, and the bit determine whether data are sampled on the
leading (first) edge or tailing (last) edge of XCKn. Refer to the
tion” on page 272
• Bit 7:0 – BSEL[7:0]: Baud Rate Register
These are the lower 8 bits of the 12-bit BSEL value used for USART baud rate setting. BAUDC-
TRLB contains the four most-significant bits. Ongoing transmissions by the transmitter and
receiver will be corrupted if the baud rate is changed. Writing BSEL will trigger an immediate
update of the baud rate prescaler. See the equations in
• Bit 7:4 – BSCALE[3:0]: Baud Rate Scale factor
These bits select the baud rate generator scale factor. The scale factor is given in two's comple-
ment form from -7 (0b1001) to +7 (0b0111). The -8 (0b1000) setting is reserved. See the
equations in
• Bit 3:0 – BSEL[11:8]: Baud Rate Register
These are the upper 4 bits of the 12-bit value used for USART baud rate setting. BAUDCTRLA
contains the eight least-significant bits. Ongoing transmissions by the transmitter and receiver
will be corrupted if the baud rate is changed. Writing BAUDCTRLA will trigger an immediate
update of the baud rate prescaler.
Bit
+0x07
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
Table 21-1 on page
R/W
R/W
7
0
7
0
for details.
R/W
R/W
6
0
6
0
BSCALE[3:0]
R/W
R/W
5
0
5
0
271.
R/W
R/W
4
0
4
0
BSEL[7:0]
R/W
R/W
3
0
3
0
Atmel AVR XMEGA B
Table 21-1 on page
R/W
R/W
2
0
2
0
”Master SPI Mode Clock Genera-
BSEL[11:8]
R/W
R/W
1
0
1
0
271.
R/W
R/W
0
0
0
0
BAUDCTRLA
BAUDCTRLB
288