M55800A Atmel Corporation, M55800A Datasheet - Page 127
M55800A
Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M55800A.pdf
(29 pages)
4.M55800A.pdf
(256 pages)
5.M55800A.pdf
(28 pages)
Specifications of M55800A
Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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5.2.3
ARM DDI 0029G
Debug target
The ARM7TDMI processor has hardware extensions that ease debugging at the lowest
level. The debug extensions:
•
•
•
•
The major blocks of the debug target are shown in Figure 5-2.
The ARM CPU core
The EmbeddedICE Logic
The TAP controller
allow you to halt program execution
examine and modify the core internal state of the core
view and modify the state of the memory system
resume program execution.
Copyright © 1994-2001. All rights reserved.
EmbeddedICE
This has hardware support for debug.
This is a set of registers and comparators used to generate debug
exceptions such as breakpoints. This unit is described in About
EmbeddedICE Logic on page 5-13.
This controls the action of the scan chains using a JTAG serial interface.
Scan chain 2
Logic
TAP controller
Scan chain 0
Scan chain 1
Figure 5-2 ARM7TDMI block diagram
Main processor
logic
Debug Interface
5-5
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