M55800A Atmel Corporation, M55800A Datasheet - Page 70

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Programmer’s Model
2.10
2-24
Reset
When the nRESET signal goes LOW a reset occurs, and the ARM7TDMI core
abandons the executing instruction and continues to increment the address bus as if still
fetching word or halfword instructions. nMREQ and SEQ indicates internal cycles
during this time.
When nRESET goes HIGH again, the ARM7TDMI processor:
1.
2.
3.
4.
After reset, all register values except the PC and CPSR are indeterminate.
More information is provided in Reset sequence after power up on page 3-33.
Overwrites R14_svc and SPSR_svc by copying the current values of the PC and
CPSR into them. The values of the PC and CPSR are indeterminate.
Forces M[4:0] to b10011, Supervisor mode, sets the I and F bits, and clears the
T-bit in the CPSR.
Forces the PC to fetch the next instruction from address
Reverts to ARM state if necessary and resumes execution.
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ARM DDI 0029G