SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 139
SAM4S16C
Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Specifications of SAM4S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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11.6.6.3
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
SMLA and SMLAW
Signed Multiply Accumulate (halfwords).
Syntax
op{XY}{cond} Rd, Rn, Rm
op{Y}{cond} Rd, Rn, Rm, Ra
where
op
cond
Rd
Rn, Rm
Ra
Operation
The
The non-specified halfwords of the source registers are ignored.
The
The bottom 16 bits of the 48-bit product are ignored.
If overflow occurs during the addition of the accumulate value, the instruction sets the Q flag in
the APSR. No overflow can occur during the multiplication.
Restrictions
In these instructions, do not use SP and do not use PC.
Condition Flags
If an overflow is detected, the
• Multiplies the specified signed halfword, top or bottom, values from
• Adds the value in
• Writes the result of the multiplication and addition in
• Multiply the 32-bit signed values in
• Add the 32-bit signed value in
• Writes the result of the multiplication and addition in
SMALBB
SMLAWB
– The top signed halfword of
– The bottom signed halfword of
,
and
SMLABT
are registers holding the values to be multiplied.
is one of:
SMLA Signed Multiply Accumulate Long (halfwords)
X
second multiply operand.
If
If
If Y
If
SMLAW Signed Multiply Accumulate (word by halfword)
Y
If
If
is an optional condition code, see
is the destination register. If
is a register holding the value to be added or subtracted from.
SMLAWT
and
X
X
Y
specifies which half of the source register
Y
Y
is
is
is
is
is
is
,
SMLATB
B
B
T
T
T
B
Y
Ra
, then the top halfword, bits [31:16], of
, then the bottom halfword, bits [15:0], of
, then the top halfword, bits [31:16], of
, then the top halfword, bits [31:16] of
, then the bottom halfword, bits [15:0], of
, then the bottom halfword, bits [15:0] of
specifies which half of the source registers
to the resulting 32-bit product.
instructions:
,
SMLATT
Q
flag is set.
Ra
instructions:
Rm
to the top 32 bits of the 48-bit product
,
Rn
T
Rm
instruction suffix.
Rd
with:
,
B
is omitted, the destination register is
instruction suffix.
“Conditional Execution”
Rm
Rm
Rd
Rd
Rn
Rm
is used as the second multiply operand.
.
.
Rm
Rm
Rn
is used.
is used.
is used
Rn
is used.
is used.
is used.
and
.
Rm
Rn
are used as the first and
and
Rn
Rm
.
.
SAM4S
SAM4S
139
139
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