SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 19

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
5.4
5.5
5.5.1
11100A–ATARM–28-Oct-11
Active Mode
Low-power Modes
Backup Mode
Figure 5-3.
Active mode is the normal running mode with the core clock running from the fast RC oscillator,
the main crystal oscillator or the PLLA. The power management controller can be used to adapt
the frequency and to disable the peripheral clocks.
The various low-power modes of the SAM4S are described below:
The purpose of backup mode is to achieve the lowest power consumption possible in a system
which is performing periodic wake-ups to perform tasks but not requiring fast startup time. Total
current consumption is 3 µA typical.
The Supply Controller, zero-power power-on reset, RTT, RTC, Backup registers and 32 kHz
oscillator (RC or crystal oscillator selected by software in the Supply Controller) are running. The
regulator and the core supply are off.
Backup mode is based on the Cortex-M4 deep sleep mode with the voltage regulator disabled.
The SAM4S can be awakened from this mode through WUP0-15 pins, the supply monitor (SM),
the RTT or RTC wake-up event.
Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the Cortex-M4
System Control Register set to 1. (See the Power management description in The ARM Cortex-
M4 Processor section of the product datasheet).
Exit from Backup mode happens if one of the following enable wake up events occurs:
• WKUPEN0-15 pins (level transition, configurable debouncing)
Main Supply
Backup Battery
Backup
Battery
IN
ON/OFF
3.3V
LDO
Note: The two diodes provide a “switchover circuit” (for illustration purpose)
between the backup battery and the main supply when the system is put in
backup mode.
+
-
OUT
External wakeup signal
ADC, DAC, Analog
Comparator Supply
(2.0V-3.6V)
VDDCORE
VDDIO
VDDPLL
VDDOUT
VDDIN
PIOx (Output)
WAKEUPx
Analog Comp.
Transceivers.
Regulator
ADC, DAC
Voltage
USB
SAM4S
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