SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 632
SAM9G10
Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(1274 pages)
2.SAM9261.pdf
(43 pages)
3.SAM9G10.pdf
(750 pages)
4.SAM9G10.pdf
(39 pages)
Specifications of SAM9G10
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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• DIR: Transfer Direction (only available for control endpoints)
Read-write
0 = Allows Data OUT transactions in the control data stage.
1 = Enables Data IN transactions in the control data stage.
Refer to Chapter 8.5.3 of the Universal Serial Bus Specification, Rev. 2.0 for more information on the control data stage.
This bit must be set before UDP_CSRx/RXSETUP is cleared at the end of the setup stage. According to the request sent in
the setup data packet, the data stage is either a device to host (DIR = 1) or host to device (DIR = 0) data transfer. It is not
necessary to check this bit to reverse direction for the status stage.
• EPTYPE[2:0]: Endpoint Type
Read-write
• DTGLE: Data Toggle
Read-only
0 = Identifies DATA0 packet.
1 = Identifies DATA1 packet.
Refer to Chapter 8 of the Universal Serial Bus Specification, Rev. 2.0 for more information on DATA0, DATA1 packet
definitions.
• EPEDS: Endpoint Enable Disable
Read:
0 = Endpoint disabled.
1 = Endpoint enabled.
Write:
0 = Disables endpoint.
1 = Enables endpoint.
Control endpoints are always enabled. Reading or writing this field has no effect on control endpoints.
Note: After reset, all endpoints are configured as control endpoints (zero).
• RXBYTECNT[10:0]: Number of Bytes Available in the FIFO
Read-only
When the host sends a data packet to the device, the USB device stores the data in the FIFO and notifies the microcon-
troller. The microcontroller can load the data from the FIFO by reading RXBYTECENT bytes in the UDP_FDRx register.
634
000
001
101
010
110
011
111
SAM9G10
Control
Isochronous OUT
Isochronous IN
Bulk OUT
Bulk IN
Interrupt OUT
Interrupt IN
6462B–ATARM–6-Sep-11
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