SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 17
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SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
- Current page: 17 of 832
- Download datasheet (13Mb)
7.2.3
7.3
6384E–ATARM–05-Feb-10
Peripheral DMA Controller
Masters to Slaves Access
All the Masters can normally access all the Slaves. However, some paths do not make sense,
like as example allowing access from the Ethernet MAC to the Internal Peripherals. Thus, these
paths are forbidden or simply not wired, and shown “-” in
Table 7-3.
The Peripheral DMA Controller handles transfer requests from the channel according to the fol-
lowing priorities (Low to High priorities):
• Acting as one Matrix Master
• Allows data transfers from/to peripheral to/from any memory space without any intervention
• Next Pointer Support, forbids strong real-time constraints on buffer management.
• Twenty-four channels
2
3
4
0
1
of the processor.
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Synchronous Controller
– Two for each Serial Peripheral Interface
– One for Multimedia Card Interface
– One for Analog-to-Digital Converter
– Two for the Two-wire Interface
– TWI Transmit Channel
– DBGU Transmit Channel
– USART5 Transmit Channel
– USART4 Transmit Channel
– USART3 Transmit Channel
– USART2 Transmit Channel
– USART1 Transmit Channel
– USART0 Transmit Channel
– SPI1 Transmit Channel
External Bus Interface
UHP User Interface
Internal Peripherals
Internal SRAM
Internal SRAM
Internal ROM
Master
Slave
16 Kbytes
16 Kbytes
AT91SAM9G20 Masters to Slaves Access
Instruction &
ARM926
0 & 1
Data
X
X
X
X
X
X
Peripheral
Controller
DMA
X
X
X
X
X
2
X
Table
Controller
ISI
X
X
X
3
-
-
-
7-3.
AT91SAM9G20
Ethernet
MAC
X
X
X
4
-
-
-
USB Host
Controller
X
X
X
5
-
-
-
17
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