SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 27

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SAM9G46

Manufacturer Part Number
SAM9G46
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G46

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
7.3
7.3.1
7.3.2
11028CS–ATARM–20-Apr-11
External Memories
DDRSDRC0 Multi-port DDRSDR Controller
External Bus Interface
The SAM99G46 features a Multi-port DDR2 Interface and an External Bus Interface allowing to
connect to a wide range of external memories and to any parallel peripheral.
Four AHB Interfaces, Management of All Accesses Maximizes Memory Bandwidth and Mini-
mizes Transaction Latency.
• Supports AHB Transfers:
• Supports DDR2, LPDDR
• Numerous Configurations Supported
• Programming Facilities
• Energy-saving Capabilities
• Power-up Initialization by Software
• CAS Latency of 2, 3 Supported
• Reset function supported (DDR2)
• Auto Precharge Command Not Used
• On Die Termination not supported
• OCD mode not supported
• Integrates Three External Memory Controllers:
• Additional logic for NAND Flash and CompactFlash
• Optional Full 32-bit External Data Bus
• Up to 26-bit Address Bus (up to 64MBytes linear per chip select)
• Up to 6 chip selects, Configurable Assignment:
– Word, Half Word, Byte Access.
– 2K, 4K, 8K, 16K Row Address Memory Parts
– DDR2 with Four Internal Banks
– DDR2/LPDDR with 16-bit Data Path
– One Chip Select for DDR2/LPDDR Device (256 Mbytes Address Space)
– Multibank Ping-pong Access (Up to 4 Banks Opened at Same Time = Reduces
– Timing Parameters Specified by Software
– Automatic Refresh Operation, Refresh Rate is Programmable
– Automatic Update of DS, TCR and PASR Parameters
– Self-refresh, Power-down and Deep Power Modes Supported
– Static Memory Controller
– DDR2/SDRAM Controller
– SLC Nand Flash ECC Controller
– Static Memory Controller on NCS0
– DDR2/SDRAM Controller (SDCS) or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
Average Latency of Transactions)
TM
SAM9G46
27

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