SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 106
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Coprocessor Interface
4.1
4-2
About coprocessors
The ARM7TDMI core instruction set enables you to implement specialized additional
instructions using coprocessors to extend functionality. These are separate processing
units that are tightly coupled to the ARM7TDMI processor. A typical coprocessor
contains:
•
•
•
•
•
A coprocessor is connected to the same data bus as the ARM7TDMI processor in the
system, and tracks the pipeline in the ARM7TDMI processor. This means that the
coprocessor can decode the instructions in the instruction stream, and execute those that
it supports. Each instruction progresses down both the ARM7TDMI core pipeline and
the coprocessor pipeline at the same time.
The execution of instructions is shared between the ARM7TDMI core and the
coprocessor.
The ARM7TDMI processor:
1.
2.
3.
The coprocessor:
1.
2.
3.
4.
If a coprocessor cannot execute an instruction, the instruction takes the undefined
instruction trap. You can choose whether to emulate coprocessor functions in software,
or to design a dedicated coprocessor.
an instruction pipeline (pipeline follower)
instruction decoding logic
handshake logic
a register bank
special processing logic, with its own data path.
Evaluates the instruction type and the condition codes to determine whether the
instructions are executed by the coprocessor, and communicates this to any
coprocessors in the system, using nCPI.
Generates any addresses that are required by the instruction, including
prefetching the next instruction to refill the pipeline.
Takes the undefined instruction trap if no coprocessor accepts the instruction.
Decodes instructions to determine whether it can accept the instruction.
Indicates whether it can accept the instruction by using CPA and CPB.
Fetches any values required from its own register bank.
Performs the operation required by the instruction.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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