SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 273

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
B.19
ARM DDI 0029G
Programming Restriction
The EmbeddedICE Logic watchpoint units must only be programmed when the clock
to the core is stopped. This can be achieved by putting the core into the debug state.
The reason for this restriction is that if the core continues to run at ECLK rates when
EmbeddedICE Logic is being programmed at TCK rates, it is possible for the
BREAKPT signal to be asserted asynchronously to the core.
This restriction does not apply if MCLK and TCK are driven from the same clock, or
if it is known that the breakpoint or watchpoint condition can only occur some time after
EmbeddedICE Logic has been programmed.
This restriction does not apply in any event to the debug control or status registers.
Note
Copyright © 1994-2001. All rights reserved.
Debug in Depth
B-55

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