SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 281
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Index
The items in this index are listed in alphabetical order, with symbols and numerics appearing at the end. The
references given are to page numbers.
A
Abort 3-24
Abort Mode 2-7
AC Timing diagrams
ARM DDI 0029G
ABE address control 7-6
ALE address control 7-26
APE address control 7-27
bidirectional data read cycle 7-8
bidirectional data write cycle 7-7
breakpoint timing 7-20
configuration pin timing 7-13
coprocessor timing 7-14
data bus control 7-9
DCC output 7-19
debug timing 7-17
exception timing 7-15
general timings 7-4, 7-5
MCLK 7-22
output 3-state time 7-10
scan general timing 7-23
synchronous interrupt 7-16
TCK and ECLK realtionship 7-21
Copyright © 1994-2001. All rights reserved.
Access times
Accesses
Accessing high registers in Thumb state
Address bits
Address bus
Address timing 3-14
Addressing signals 3-11
Architecture
ARM
ARM-state
unidirectional data read cycle 7-12
unidirectional data write cycle 7-11
units of nanoseconds 7-28
stretching 3-29
byte 3-26
halfword 3-26
reads 3-26
writes 3-27
significant 3-12
configuring 3-14
v4T 2-2
instruction summary 1-12
2-12
B
Bidirectional bus timing 3-18
Bidirectional data bus 3-19
Big-endian 2-4, 2-5
Block diagram 1-7
Breakpoints
Burst types 3-7
Bus cycle types 3-4
addressing modes 1-15
condition fields 1-19
fields 1-18
operand 2 1-18
register orgnaization 2-9
register set 2-8
hardware B-45
programming B-45
software B-46
timing 7-20
clearing B-46
setting B-46
Index-1
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