SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 169
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SAM9M11
Manufacturer Part Number
SAM9M11
Description
Manufacturer
Atmel Corporation
Specifications of SAM9M11
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Cycle
1
2
3
4
6.18
ARM DDI 0029G
Address
pc+2L
pc+2L
Xn
Xn+4
Xn+8
Undefined instructions and coprocessor absent
MAS
[1:0]
i
i
2
2
When the processor attempts to execute an instruction that neither it nor a coprocessor
can perform (including all undefined instructions) this causes the processor to take the
undefined instruction trap.
Cycle timings are listed in Table 6-21 where:
•
•
•
•
nRW
0
0
0
0
C represents the current mode-dependent value
T represents the current state-dependent value.
Coprocessor instructions are not available in Thumb state.
CPA and CPB are HIGH during the undefined instruction trap.
Note
Copyright © 1994-2001. All rights reserved.
Data
(pc+2L)
-
(Xn)
(Xn+4)
nMREQ
1
0
0
0
Table 6-21 Undefined instruction cycle operations
SEQ
0
0
1
1
nOPC
0
0
0
0
nCPI
0
1
1
1
nTRANS
C
C
1
1
Instruction Cycle Timings
Mode
Old
Old
00100
00100
TBIT
T
T
0
0
6-27
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