SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 277
SAM9M11
Manufacturer Part Number
SAM9M11
Description
Manufacturer
Atmel Corporation
Specifications of SAM9M11
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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IRQ
Joint Test Action Group
JTAG
Link register
Little-endian memory
LR
Macrocell
Memory Management Unit
MMU
PC
Privileged mode
Processor Status Register
Program Counter
Program Status Register
ARM DDI 0029G
Interrupt request.
The name of the organization that developed standard IEEE 1149.1. This standard
defines a boundary-scan architecture used for in-circuit testing of integrated circuit
devices.
See Joint Test Action Group.
This register holds the address of the next instruction after a branch with link
instruction.
Memory organization where the most significant byte of a word is at a higher address
than the least significant byte.
See Link register
A complex logic block with a defined interface and behavior. A typical VLSI system
will comprise several macrocells (such as an ARM7TDMI, an ETM7, and a memory
block) plus application-specific logic.
Allows control of a memory system. Most of the control is provided through translation
tables held in memory. The ARM7TDMI processor does not include a memory
management unit, but you can add one if required.
See Memory Management Unit
See Program Counter.
Any processor mode other than User mode. Memory systems typically check memory
accesses from privileged modes against supervisor access permissions rather than the
more restrictive user access permissions. The use of some instructions is also restricted
to privileged modes.
See Program Status Register
Register 15, the Program Counter, is used in most instructions as a pointer to the
instruction that is two instructions after the current instruction.
Contains some information about the current program and some information about the
current processor. Also referred to as Processor Status Register.
Copyright © 1994-2001. All rights reserved.
Glossary-3
Glossary
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