SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 275
SAM9M11
Manufacturer Part Number
SAM9M11
Description
Manufacturer
Atmel Corporation
Specifications of SAM9M11
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Glossary
Abort
Addressing modes
Arithmetic Logic Unit
ALU
ARM state
Big-endian
Banked registers
ARM DDI 0029G
This glossary describes some of the terms used in this manual. Where terms can have
several meanings, the meaning presented here is intended.
Is caused by an illegal memory access. Abort can be caused by the external memory
system, an external MMU or the EmbeddedICE Logic.
A procedure shared by many different instructions, for generating values used by the
instructions. For four of the ARM addressing modes, the values generated are memory
addresses (which is the traditional role of an addressing mode). A fifth addressing mode
generates values to be used as operands by data-processing instructions.
The part of a computer that performs all arithmetic computations, such as addition and
multiplication, and all comparison operations.
See Arithmetic Logic Unit.
A processor that is executing ARM (32-bit) instructions is operating in ARM state.
Memory organization where the least significant byte of a word is at a higher address
than the most significant byte.
Register numbers whose physical register is defined by the current processor mode. The
banked registers are registers R8 to R14.
Copyright © 1994-2001. All rights reserved.
Glossary-1
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