SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 42

• Manufacturer Part Number: SAM9M11
• Manufacturer: Atmel Corporation

Specifications of SAM9M11

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Dac Resolution (bits): No
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Introduction
1-20
Load and store sign-extended byte and
Load and store with immediate offset
High register operations and branch
Move, compare, add, and subtract
Load and store with relative offset
Add offset to stack pointer
SP-relative load and store
Load and store halfword
Push and pop registers
Multiple load and store
Unconditional branch
Long branch with link
Move shifted register
Conditional branch
Copyright © 1994-2001. All rights reserved.
Software interrupt
Add and subtract
PC-relative load
ALU operation
Load address
immediate
exchange
halfword
Format
Format
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
0
0 0 1
0 1 0 0 0 0
0 1 0 0 0 1
0 1 0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 0
1 0 1
1 0
1 0
1 1
1 1
1
1
1
0
0
1 0 1
1 1 0
1 1 1
Figure 1-6 Thumb instruction set formats
0
0
1 1 0
1 1 L
0 0 L
0 1
B L
1
1 L B 0
1 H S 1
0 L
1 L
0 SP
Op
Op
H
1
1 1 1 1
0
Cond
1
0 0 0 S
1 0 R
Op
Rd
Rd
Rd
Rd
Rb
Offset5
Offset5
Offset5
Op
offset3
Op
Rn/
H1 H2
Ro
Ro
Offset11
Offset
Rs/Hs
Softset8
Offset8
Value8
Word8
Word8
Word8
Rb
Rb
Rb
Rb
Rs
Rs
Rs
SWord7
Rlist
Rlist
ARM DDI 0029G
RdHd
Rd
Rd
Rd
Rd
Rd
Rd
Rd