SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 287
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 287 of 290
- Download datasheet (5Mb)
Index
The items in this index are listed in alphabetic order. The references given are to page numbers.
A
Abort
Aborted watchpoint
Access
Address bits, significant
Addressing mode 2
Addressing mode 2 (privileged)
Addressing mode 3
Addressing mode 4 (load)
Addressing mode 4 (store)
Alignment
Data
handler
mode
Prefetch
vector
system speed
watchpointed
2-23
2-23, C-27
2-8
C-25
2-7
2-24
2-23, C-27
C-24
C-25, C-27
1-16
1-18
C-26
4-7
1-18
1-18
1-17
Copyright © 2000 ARM Limited. All rights reserved.
ARM
ARM state to Thumb state
ARM9E-S
B
Banked registers
Big-endian
BKPT
Block diagram, ARM9E-S
instruction set
instruction set summary
state
architecture
block diagram
core diagram
functional diagram
instruction set
signals compared to
2-25
1-5, 2-3
2-4
ARM9TDMI
1-5
2-9, C-19
1-7
1-5
1-10
1-7
1-7
2-3
1-7
1-12
B-2
Boundary-scan
Breakpoint instruction
Breakpoints
Burst types
Bus cycles, CLKEN
Busy-wait
Bypass register
Byte
C
C flag
CFGBIGEND
CFGDISLTBIT
chain cells
interface
instruction boundary
Prefetch Abort
abandoned
interrupted
access
2-7
2-16
6-6, 6-17
4-21
4-10
7-7, 7-9, C-24
C-5
A-6
C-5
6-17
6-17
C-9, C-10
A-6
7-10
4-31
2-25
7-10
Index-i
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