SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 1118
SAM3SD8B
Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
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Figure 40-34. Two-wire Serial Bus Timing
40.11.9
The maximum operating frequency is given in tables
time when the processor is fetching code out of it. The tables
frequency depending on the field FWS of the MC_FMR register. This field defines the number of wait states required to
access the Embedded Flash Memory.
Table 40-54. Embedded Flash Wait State VDDCORE set at 1.65V
Table 40-55. Embedded Flash Wait State VDDCORE set at 1.80V
Table 40-56. AC Flash Characteristics
1118
1118
TWCK
Parameter
Program Cycle Time
Full Chip Erase
Data Retention
Endurance
TWD
SAM3S8/SD8
SAM3S8/SD8
Embedded Flash Characteristics
t
SU;STA
FWS
FWS
0
1
2
3
0
1
2
t
HD;STA
Conditions
per page including auto-erase
per page without auto-erase
Not Powered or Powered
Write/Erase cycles @ 25°C
Write/Erase cycles @ 85°C
t
t
of
LOW
Read Operations
Read Operations
2 cycles
3 cycles
4 cycles
2 cycles
3 cycles
1 cycle
1 cycle
t
HIGH
t
HD;DAT
40-54
and
40-54
t
LOW
40-55
and
below but is limited by the Embedded Flash access
t
SU;DAT
40-55
Min
10K
10
Maximum Operating Frequency (MHz)
Maximum Operating Frequency (MHz)
below give the device maximum operating
Typ
30K
10
21
35
60
64
25
44
64
t
SU;STO
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Max
11.5
t
r
4.6
2.3
cycles
Units
Years
t
BUF
ms
ms
ms
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