SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 901

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

35.6.5.4
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Changing the Synchronous Channels Update Period
It is possible to change the update period of synchronous channels while they are enabled. (See
“Method 2: Manual write of duty-cycle values and automatic trigger of the update” on page 890
and
page
To prevent an unexpected update of the synchronous channels registers, the user must use the
“PWM Sync Channels Update Period Update Register”
update period of synchronous channels while they are still enabled. This register holds the new
value until the end of the update period of synchronous channels (when UPRCNT is equal to
UPR in
rent PWM period, then updates the value for the next period.
Note:
Note:
Figure 35-18. Synchronized Update of Update Period Value of Synchronous Channels
“Method 3: Automatic write of duty-cycle values and automatic trigger of the update” on
892.)
“PWM Sync Channels Update Period Register”
If the update register PWM_SCUPUPD is written several times between two updates, only the last
written value is taken into account.
Changing the update period does make sense only if there is one or more synchronous channels
and if the update method 1 or 2 is selected (UPDM = 1 or 2 in
ter”
).
End of PWM period and
end of Update Period
of Synchronous Channels
PWM_SCUPUPD Value
User's Writing
PWM_SCUP
(PWM_SCUP)) and the end of the cur-
(PWM_SCUPUPD) to change the
“PWM Sync Channels Mode Regis-
SAM3S8/SD8
SAM3S8/SD8
901
901