SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 714

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
mat is modified and includes sync information.
sists of a user-defined pattern that indicates the beginning of a valid data.
illustrates these patterns. If the start frame delimiter, also known as start bit, is one bit, (ONEBIT
to 1), a logic zero is Manchester encoded and indicates that a new character is being sent seri-
ally on the line. If the start frame delimiter is a synchronization pattern also referred to as sync
(ONEBIT to 0), a sequence of 3 bit times is sent serially on the line to indicate the start of a new
character. The sync waveform is in itself an invalid Manchester waveform as the transition
occurs at the middle of the second bit time. Two distinct sync patterns are used: the command
sync and the data sync. The command sync has a logic one level for one and a half bit times,
then a transition to logic zero for the second one and a half bit times. If the MODSYNC field in
the US_MR register is set to 1, the next character is a command. If it is set to 0, the next charac-
ter is a data. When direct memory access is used, the MODSYNC field can be immediately
updated with a modified character located in memory. To enable this mode, VAR_SYNC field in
US_MR register must be set to 1. In this case, the MODSYNC field in US_MR is bypassed and
the sync configuration is held in the TXSYNH in the US_THR register. The USART character for-
Figure 32-9. Preamble Patterns, Default Polarity Assumed
A start frame delimiter is to be configured using the ONEBIT field in the US_MR register. It con-
Manchester
Manchester
Manchester
Manchester
encoded
encoded
encoded
encoded
data
data
data
data
Txd
Txd
Txd
Txd
8 bit width "ZERO_ONE" Preamble
8 bit width "ONE_ZERO" Preamble
8 bit width "ALL_ZERO" Preamble
8 bit width "ALL_ONE" Preamble
SAM3S8/SD8
SAM3S8/SD8
SFD
SFD
SFD
SFD
Figure 32-10
DATA
DATA
DATA
DATA
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