SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 398

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

Figure 23-20. TDF Optimization Disabled (TDF Mode = 0). TDF wait states between 2 read accesses on different chip
Figure 23-21. TDF Mode = 0: TDF wait states between a read and a write access on different chip selects
398
398
read1 controlling signal
read2 controlling signal
write2 controlling signal
read1 controlling signal
SAM3S8/SD8
SAM3S8/SD8
A[ 23:0]
(NRD)
(NRD)
A [23:0]
D[7:0]
(NWE)
(NRD)
D[7:0]
selects
MCK
MCK
TDF_CYCLES = 6
TDF_CYCLES = 4
read1 cycle
read1 cycle
read1 hold = 1
read1 hold = 1
TDF_CYCLES = 4
Chip Select
Wait State
Read to Write
Wait State
Chip Select
TDF_CYCLES = 6
Wait State
2 TDF WAIT STATES
5 TDF WAIT STATES
write2 setup = 1
(optimization disabled)
TDF_MODE = 0
write2 cycle
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
(optimization disabled)
TDF_MODE = 0
read2 setup = 1
read 2 cycle