SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 1203

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SAM3X8C

Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
Datasheets
• DESC_LDST: Descriptor Loaded Status
0: cleared automatically when read by software.
1: set by hardware when a descriptor has been loaded from the system bus.
Valid until the CHANN_ENB flag is cleared at the end of the next buffer transfer.
• BUFF_COUNT: Buffer Byte Count
This field determines the current number of bytes still to be transferred for this buffer.
This field is decremented from the AHB source bus access byte width at the end of this bus address phase.
The access byte width is 4 by default, or less, at DMA start or end, if the start or end address is not aligned on a word
boundary.
At the end of buffer, the DMA accesses the UOTGHS device only for the number of bytes needed to complete it.
Note:
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
For IN pipes, if the receive buffer byte length (UOTGHS_HSTDMACONTROL.BUFF_LENGTH) has been defaulted to zero
because the USB transfer length is unknown, the actual buffer byte length received will be 0x10000-BUFF_COUNT.
SAM3X/A
SAM3X/A
1203
1203

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